PMC-FPGA03Àº ³ôÀº 󸮴ɷ°ú GigaHertsÀÇ digital
I/O ´É·ÂÀ» °¡Áø 64bit PMC ¸ðµâ·Î Xilinx»çÀÇ Virtex-II
Pro¢â FPGA¸¦ žÀçÇÑ Á¦Ç°À¸·Î ¾Æ·¡¿Í °°Àº Ư¡À» °¡Áö°í
ÀÖ´Ù.
¢Â Features
Xilinx Virtex-II Pro¢â FPGA • XC2VP50 • - 5
or -6 speed grade
High-speed serial I/O (RocketIO): • 4x
front-panel connections • 4x
connections to PMC user I/O (note: RocketIOs are build
options)
Parallel Digital I/O • 138
front panel signal lines • 64
PMC user I/O (P4) signal lines
Modular I/O system supporting standards such as LVDS and custom I/O
64-bit/66MHz master/slave PCI interface
DDR SDRAM
• 2x
banks • 64Mytes
per bank
QDR-II SRAM • 3x
banks • 18/18-bit
read/write paths • up
to 8Mwords per bank
4Mbytes Flash Memory
Rugged, conduction-cooled build variants
PMC-FPGA03Àº Xilinx»çÀÇ Virtex-II Pro¢â XC2VP50 FPGA¸¦
°¡Áö°í ÀÖÀ¸¸ç, µÎ °¡Áö ÁÖ¿ä Ư¡À¸·Î Multi-channel Gbps
communication°ú embedded PowerPC 405 processor¸¦ °¡Áö´Â Xilinx»çÀÇ Virtex-II
Pro¢â FPGA Á¦Ç°À» Æ÷ÇÔÇÏ°í ÀÖ´Ù.
¢Â
Digital I/O PMC-FPGA03Àº switch fabric serial comms°ú LVDS, FPDP¿Í
custom interfaceµîÀ» Áö¿ø
¢Â
RocketIO FPGAÀÇ RocketIO Æ÷Æ®¸¦ ÅëÇؼ ³ôÀº ¼ÓµµÀÇ ½Ã¸®¾ó
Åë½ÅÀ» ÇÒ ¼ö ÀÖ´Ù. ÀÌµé °¢°¢ÀÇ Æ÷Æ®µéÀº -5 speed grade¿¡¼´Â
2.0Gbps±îÁö -6 speed grade¿¡¼´Â 3.12Gbps±îÁö ÀÛµ¿ÇÒ
¼ö ÀÖ´Ù.
|
|
¢Â
Memory °·ÂÇÑ ¸Þ¸ð¸® ´É·ÂÀº ¿£Áö´Ï¾î·Î ÇÏ¿©±Ý ³ôÀº ¼öÇà´É·ÂÀÇ
µÎ°¡Áö ŸÀÔÀÇ ¿ÜºÎ ¸Þ¸ð¸®¸¦ °¡Áö°í ½±°Ô ¾Ë°í¸®ÁòÀ» µðÀÚÀÎÇÏ°Ô
ÇÏ¿©ÁØ´Ù.
1) SDRAM µÎ°³ÀÇ µ¶¸³ÀûÀÎ DDR
SDRAM(°¢°¢ 64Mbytes)ÀÌ 125MHzÀÇ ¼Óµµ·Î FPGA¿¡ Á÷Á¢ ¿¬°áµÇ¾î
ÀÖ´Ù.
2) QDR SDRAM ¼¼ °³ÀÇ µ¶¸³ÀûÀÎ
QDR-II SDRAMÀÌ °¢°¢ÀÇ µ¶¸³ÀûÀÎ Æ÷Æ®¸¦ °¡Áö°í 125MHzÀÇ
¼Óµµ·Î FPGA¸¦ Áö¿øÇϸç, °¢°¢ÀÇ QDR SDRAMÀº µ¿½Ã¿¡ Àбâ¿Í
¾²±â¸¦ ¼öÇàÇÒ ¼ö ÀÖ°í, °¡¿ë ´ë¿ªÆøÀÌ 1Gbyte/secÀÌ´Ù.
¿É¼Ç¿¡ µû¶ó¼ 1 or 2M x 1Gbyte/sec¸¦ Áö¿øÇÑ´Ù.
¢Â
Input / Output - Front
Panel: 138-bit data/clocks plus power) or 4x RocketIO
channels - PMC User I/O: 64-bit data or 28-bit data
plus 4x RocketIO channels
¢Â Software 1)
PF-Toolset/BSP Library Firmware°¡ BSP¿¡¼
Á¦°øµÇ¾îÁö°í, FPGA¿Í ´Ù¸¥ º¸µå Çϵå¿þ¾î »çÀÌ¿¡ Ç¥ÁØ
ÀÎÅÍÆäÀ̽º¸¦ ¸¸µç´Ù.
2) Matlab/Gedae PMC-FPGA03¿¡´Â
Xilinx System Generator 6.1ÀÇ »ç¿ëÀ» Áö¿øÇϸç, ¸ÖƼÇÁ·Î¼¼¼
°³¹ßȯ°æÀÎ Gedae¸¦ Áö¿øÇÑ´Ù.
(3) IP Cores
Intellectual property(IP) coresÀÇ ¸¹Àº ¾Ë°í¸®ÁòÀ»
»ç¿ëÇϱâ À§ÇÑ Áõ¸íµÈ Æß¿þ¾î µðÀÚÀÎÀÌ´Ù. Äھ Æ÷ÇԵǾîÀÖ´Â
°ÍµéÀº ¾Æ·¡¿Í °°´Ù.
- High Throughput FFT - Floating-point
Mathematics - Digital Radar Receiver - Scalable
QR Decomposition
(4) Embedded PowerPC ÀÌ
µð¹ÙÀ̽º¿¡ ¼ÒÇÁÆ®¿þ¾î °³¹ßÀº Xilinx embedded development
kit(EDK)¸¦ ÅëÇØ Áö¿øµÇ¸ç, ¿©±â¿¡´Â GNU C/C++ ¼ÒÇÁÆ®¿þ¾î
°³¹ßȯ°æ°ú VxWorks BSP°¡ Æ÷ÇԵǾîÀÖ´Ù.
|
Product
|
Format
|
FPGA
|
External Memory
|
Interface
|
Misc.
|
PMC-FPGA03
|
PMC
|
Xilinx Virtex II Pro XC2VP50
|
6-48Mbytes
QDR SRAM, 128Mbytes SDRAM. 4Mbytes flash
|
138-bit
header for front panel IO. 64-bit user IO port. 64-bit 66MHz PCI (with DMA
support)
|
Up to 8
High-speed serial I/O (RocketIO)
|
PMC-FPGA02
|
PMC
|
Xilinx Virtex II XC2V3000, 6000 or
8000
|
6Mbytes
QDR SRAM, 128Mbytes SDRAM. 4Mbytes flash
|
69-bit
header for front panel IO. 64-bit user IO port. 64-bit 66MHz PCI (with DMA
support).
|
Single
ended/LVDS IO with FPDP options, PMC user IO data routing.
|
PMC-FPGA01
|
PMC
|
Xilinx Virtex XCV300E
|
128Mbytes
SDRAM. 2Mbytes flash
|
Shared
64-bit IO port for front panel and user IO. 64-bit 66MHz PCI (with DMA
support).
|
FPDP and
LVDS IO options, PMC user IO data routing.
|
TS-C43
|
PMC
|
Xilinx Virtex-II XC2V1000/3000
|
256Mbytes
SDRAM, 4Mbytes flash
|
69-bit IO
port/header
|
ADSP-TS101
DSPs (x4)
|
TS-P36N
|
PCI |
Xilinx Virtex-II XC2V1000/3000
|
256Mbytes
SDRAM, 4Mbytes flash
|
64-bit
high-density header
|
ADSP-TS101
DSPs (x4)
|
TS-CP1
|
cPCI
|
Xilinx Virtex-II XC2V8000 per node
|
128Mbytes
SDRAM, 4Mbytes flash, 12bytes QDR SRAM per node
|
Direct
FPGA I/O to backplane
|
ADSP-TS101
DSP per node
|
|